The three stages of semiconductor device manufacture are wafer fabrication, assembly and testing. The testing stage always includes an evaluation of the electrical connections within the device, and often includes burn-in testing as well. In a conventional manufacturing process, before testing is done, the semiconductor wafer is diced into individual semiconductor dies, and the dies are assembled into packages. The purpose of the package is to protect the semiconductor die as well as provide connections that allow the package to be attached to a testing apparatus or printed circuit board. The fact that the testing of the individual dies does not take place until the dies have been packaged, increases the cost. This increased cost stems from the greater complexity, size, and quantity of the testing apparatus, as well as the difficulty of manipulating large quantities of separately packaged dies.
In addition to the tooling and labor costs associated with electrical and burn-in testing of individually packaged dies, there is also the wasted expense of packaging the dies that will subsequently be found to be defective. Since in a conventional process all dies must be packaged before any testing can be done, this means that all defective die will necessarily be packaged, and the expense of doing so is complete waste. For example, if 6%, a conservative estimate, of the dies fail either the electrical or burn-in testing, that is 60 die packaging operations that are wasted for every 1000 dies that are produced. The ability to test the dies before the packaging operations would obviously reduce production costs.
The savings associated with a wafer level testing protocol are multifold. In addition to the savings associated with the elimination of unnecessary packaging operations, inventory carrying costs are reduced because the processing cycle times are reduced since “good” dies are identified earlier in the manufacturing process.
Accordingly, there is a need for a wafer interposer and a method that allows for the testing of semiconductor dies while still assembled in wafer form. It is also important that the wafer interposer and method does not impede the ability to package the dies after they have passed the testing and have been cut from the wafer.